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HD64F3048VTF8 Datasheet, PDF (585/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip
Section 15 A/D Converter
5. Note on Noise: To prevent damage from surges and other abnormal voltages at the analog
input pins (AN0 to AN7) and analog reference voltage pin (VREF), connect a protection circuit
like the one in figure 15.7 between AVCC and AVSS. The bypass capacitors connected to AVCC
and VREF and the filter capacitors connected to AN0 to AN7 must be connected to AVSS. If filter
capacitors like the ones in figure 15.7 are connected, the voltage values input to the analog
input pins (AN0 to AN7) will be smoothed, which may give rise to error. Error can also occur if
A/D conversion is frequently performed in scan mode so that the current that charges and
discharges the capacitor in the sample-and-hold circuit of the A/D converter becomes greater
than that input to the analog input pins via input impedance Rin. The circuit constants should
therefore be selected carefully.
*1
*1
Rin*2
100 Ω
0.1 µF
Notes: 1. Numeric values are approximate.
10 µF
0.01 µF
AVCC
VREF
AN0 to AN7
AVSS
2. Rin: input impedance
Figure 15.7 Example of Analog Input Protection Circuit
Rev. 3.00 Sep 27, 2006 page 557 of 872
REJ09B0325-0300