HD64F3048VTF8 Datasheet, PDF (572/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 15 A/D Converter
15.1.4 Register Configuration
Table 15.2 summarizes the A/D converter’s registers.
Table 15.2 A/D Converter Registers
Address^*1
Name
Abbreviation R/W
Initial Value
H'FFE0
A/D data register A (high)
ADDRAH
R
H'00
H'FFE1
A/D data register A (low)
ADDRAL
R
H'00
H'FFE2
A/D data register B (high)
ADDRBH
R
H'00
H'FFE3
A/D data register B (low)
ADDRBL
R
H'00
H'FFE4
A/D data register C (high)
ADDRCH
R
H'00
H'FFE5
A/D data register C (low)
ADDRCL
R
H'00
H'FFE6
A/D data register D (high)
ADDRDH
R
H'00
H'FFE7
H'FFE8
H'FFE9
A/D data register D (low)
A/D control/status register
A/D control register
ADDRDL
ADCSR
ADCR
R
R/(W)^*2
R/W
H'00
H'00
H'7E^*3
Notes: 1. Lower 16 bits of the address
2. Only 0 can be written in bit 7, to clear the flag.
3. Initial value is H'7F in mask ROM versions, PROM versions, and dual power supply
flash memory versions.
Rev. 3.00 Sep 27, 2006 page 544 of 872
REJ09B0325-0300