HD64F3048VTF8 Datasheet, PDF (309/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 9 I/O Ports
9.7.2 Register Descriptions
Table 9.10 summarizes the registers of port 6.
Table 9.10 Port 6 Registers
Address^* Name
Abbreviation R/W
H'FFC9
Port 6 data direction
P6DDR
W
register
H'FFCB
Port 6 data register
P6DR
R/W
Note: * Lower 16 bits of the address.
Initial Value
Modes 1 to 5 Modes 6, 7
H'F8
H'80
H'80
H'80
Port 6 Data Direction Register (P6DDR)
P6DDR is an 8-bit write-only register that can select input or output for each pin in port 6. Bit 7 is
reserved. It cannot be modified and is always read as 1.
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
 P6₆DDR P6₅DDR P6₄DDR P6₃DDR P6₂DDR P6₁DDR P6₀DDR
1
0
0
0
0
0
0
0

W
W
W
W
W
W
W
Reserved bit
Port 6 data direction 6 to 0
These bits select input or output for port 6 pins
Modes 1 to 6 (Expanded Modes): Ports P6₆ to P6₃ function as bus control output pins (LWR,
HWR, RD, AS), regardless of the settings of P6₆DDR to P6₃DDR. Ports P6₂ to P6₀ function as the
bus control pins (BACK, BREQ, WAIT) or I/O ports. For selecting the pin function, see table
9.11. When ports P6₂ to P6₀ function as I/O ports and if P6DDR is set to 1, the corresponding pin
of port 6 functions as an output port. If P6DDR is cleared to 0, the corresponding pin functions as
an input port.
Mode 7 (Single-Chip Mode): Port 6 is a generic input/output port. A pin in port 6 becomes an
output port if the corresponding P6DDR bit is set to 1, and an input port if this bit is cleared to 0.
P6DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P6DDR is initialized to H'80 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting. If a P6DDR bit is set to 1 while port 6 acts as an I/O port, the
corresponding pin maintains its output state in software standby mode.
Rev. 3.00 Sep 27, 2006 page 281 of 872
REJ09B0325-0300