HD64F3048VTF8 Datasheet, PDF (807/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

TSNC—Timer Synchro Register
Bit
7
6


Initial value
1
1
Read/Write


Appendix B Internal I/O Register
H'61 ITU (all channels)
5
4
3
2
1
0
 SYNC4 SYNC3 SYNC2 SYNC1 SYNC0
1
0
0
0
0
0

R/W R/W R/W R/W R/W
Timer sync 0
0 TCNT0 operates independently
1 TCNT0 is synchronized
Timer sync 1
0 TCNT1 operates independently
1 TCNT1 is synchronized
Timer sync 2
0 TCNT2 operates independently
1 TCNT2 is synchronized
Timer sync 3
0 TCNT3 operates independently
1 TCNT3 is synchronized
Timer sync 4
0 TCNT4 operates independently
1 TCNT4 is synchronized
Rev. 3.00 Sep 27, 2006 page 779 of 872
REJ09B0325-0300