HD64F3048VTF8 Datasheet, PDF (837/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

SMR—Serial Mode Register
Appendix B Internal I/O Register
H'B0
SCI0
Bit
7
6
5
7
3
2
1
0
C/A or GM^* CHR
PE
O/E STOP MP CKS1 CKS0
Initial value
0
0
0
0
0
0
0
0
Read/Write
R/W
R/W R/W R/W R/W R/W
R/W R/W
Multiprocessor mode
0 Multiprocessor function disabled
1 Multiprocessor format selected
Clock select 1 and 0
Bit 1 Bit 0
CKS1 CKS0 Clock Source
0
0 φ clock
1 φ/4 clock
1
0 φ/16 clock
1 φ/64 clock
Stop bit length
0 One stop bit
1 Two stop bits
Parity mode
0 Even parity
1 Odd parity
Parity enable
0 Parity bit is not added or checked
1 Parity bit is added and checked
Character length
0 8-bit data
1 7-bit data
Communication mode
(when using a serial communication interface)
0 Asynchronous mode
1 Synchronous mode
GSM mode (when using a smart card interface)
0 Regular smart card interface operation
1 GSM mode smart card interface operation
Note: * The function of this bit differs for the normal serial communication interface and
for the smart card interface. Its function is switched with the SMIF bit in SCMR.
Rev. 3.00 Sep 27, 2006 page 809 of 872
REJ09B0325-0300