HD64F3048VTF8 Datasheet, PDF (550/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 14 Smart Card Interface
14.2.4 Serial Control Register (SCR)
Bits 1 and 0 have different functions in smart card interface mode. However, this function does not
exist in the flash memory version.
Bit
Initial value
Read/Write
7
TIE
0
R/W
6
5
4
3
2
1
0
RIE
TE
RE
MPIE TEIE CKE1 CKE0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bits 7 to 2—Operate in the same way as for the normal SCI.
For details, see section 13.2.6, Serial Control Register (SCR).
Bits 1 and 0—Clock Enable (CKE1, CKE0): Setting enable or disable for the SCI clock
selection and clock output from the SCK pin. In smart card interface mode, it is possible to switch
between enabling and disabling of the normal clock output, and specify a fixed high level or fixed
low level for the clock output.
SMR
Bit 7:
GM
0
0
1
1
1
1
SCR
Bit 1: Bit 0:
CKE1 CKE0
0
0
0
1
0
0
0
1
1
0
1
1
Description
The internal clock/SCK₀ pin functions as an I/O port (Initial value)
The internal clock/SCK₀ pin functions as the clock output
The internal clock/SCK₀ pin is fixed at low-level output
The internal clock/SCK₀ pin functions as the clock output
The internal clock/SCK pin is fixed at high-level output
0
The internal clock/SCK₀ pin functions as the clock output
Rev. 3.00 Sep 27, 2006 page 522 of 872
REJ09B0325-0300