HD64F3048VTF8 Datasheet, PDF (866/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Appendix C I/O Port Block Diagrams
C.2 Port 2 Block Diagram
Software
standby Mode 7
Hardware standby
External bus
released
Mode 7
P2 _n
Mode
1 to 6
RP2P
Reset
R
Q _{P2 nPCR} D
C
WP2P
Mode 1 to 4
Reset
R
Q _{P2n DDR} D
C
WP2D
Reset
R
Q _{P2 nDR} D
C
WP2
RP2
Legend:
WP2P: Write to P2PCR
RP2P: Read P2PCR
WP2D: Write to P2DDR
WP2: Write to port 2
RP2: Read port 2
Note: n = 0 to 7
Figure C.2 Port 2 Block Diagram (Pins P2₀ to P2₇)
Rev. 3.00 Sep 27, 2006 page 838 of 872
REJ09B0325-0300