HD64F3048VTF8 Datasheet, PDF (661/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Avoid
C _L2
Signal A
Section 19 Clock Pulse Generator
Signal B
H8/3048B Group
XTAL
EXTAL
C _L1
Figure 19.4 Example of Incorrect Board Design
19.2.2 External Clock Input
Circuit Configuration
An external clock signal can be input as shown in the examples in figure 19.5. The external clock
is input from the EXTAL pin. If the XTAL pin is left open, the stray capacitance should not
exceed 10 pF. If the stray capacitance at the XTAL pin exceeds 10 pF in configuration a, use
configuration b instead and hold the clock high in standby mode.
EXTAL
XTAL
Open
a. XTAL pin left open
External clock input
EXTAL
XTAL
74HC04
External clock input
b. Complementary clock input at XTAL pin
Figure 19.5 External Clock Input (Examples)
Rev. 3.00 Sep 27, 2006 page 633 of 872
REJ09B0325-0300