HD64F3048VTF8 Datasheet, PDF(544/903 Page) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

HD64F3048VTF8 Datasheet, PDF (544/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

◁

Section 14 Smart Card Interface

14.1.2 Block Diagram

Figure 14.1 shows a block diagram of the smart card interface.

Module data bus

RxD0

TxD0

SCK0

RDR

RSR

TDR

TSR

SCMR

SSR

SCR

SMR

BRR

Transmit/receive

control

Baud rate

generator

Parity generate

Parity check

Clock

Legend:

SCMR: Smart card mode register

RSR: Receive shift register

RDR: Receive data register

TSR: Transmit shift register

TDR: Transmit data register

SMR: Serial mode register

SCR: Serial control register

SSR: Serial status register

BRR: Bit rate register

Ï

Ï/4

Ï/16

Ï/64

TXI

RXI

ERI

Figure 14.1 Smart Card Interface Block Diagram

Internal

data

bus

Rev. 3.00 Sep 27, 2006 page 516 of 872

REJ09B0325-0300

▷