HD64F3048VTF8 Datasheet, PDF (289/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 9 I/O Ports
Port Description
Pins
Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Mode 7
Port 8 • 5-bit I/O port P8₄/CS₀
DDR = 0: generic input
• P8₂ to P8₀
have
Schmitt
inputs
DDR = 1 (after reset): CS₀ output
P8₃/CS₁/IRQ₃,
P8₂/CS₂/IRQ₂,
P8₁/CS₃/IRQ₁
IRQ₃ to IRQ₁ input, CS₁ to CS₃ output, and generic input
DDR = 0 (after reset): generic input
DDR = 1: CS₁ to CS₃ output
P8₀/RFSH/IRQ₀ IRQ₀ input, RFSH output, and generic input/output
Generic
input/
output
IRQ₃ to
IRQ₀
input and
generic
input/
output
Port 9 • 6-bit I/O port P9₅/SCK₁/IRQ₅, Input and output (SCK₁, SCK₀, RxD₁, RxD₀, TxD₁, TxD₀) for serial
P9₄/SCK₀/IRQ₄, communication interfaces 1 and 0 (SCI1/0), IRQ₅ and IRQ₄ input, and 6-
P9₃/RxD₁,
bit generic input/output
P9₂/RxD₀,
P9₁/TxD₁,
P9₀/TxD₀
Port A • 8-bit I/O port PA₇/TP₇/
• Schmitt
TIOCB₂/A₂₀
inputs
Output (TP₇) from
programmable
timing pattern
controller (TPC),
Address output
(A₂₀)
TPC Address
output output
(TP₇),
(A₂₀)
ITU input
TPC
output
(TP₇),
ITU input
input or output
(TIOCB₂) for 16-bit
integrated timer unit
(ITU), and generic
input/output
or output
(TIOCB₂),
and
generic
input/
output
or output
(TIOCB₂),
and
generic
input/
output
PA₆/TP₆/
TIOCA₂/A₂₁/
CS₄
PA₅/TP₅/
TIOCB₁/A₂₂/
CS₅
PA₄/TP₄/
TIOCA₁/A₂₃/
CS₆
TPC output (TP₆ to TPC output (TP₆ to TPC
TPC
TPC
TP₄), ITU input and TP₄), ITU input and output output output
output (TIOCA₂, output (TIOCA₂, (TP₆ to (TP₆ to (TP₆ to
TIOCB₁, TIOCA₁), TIOCB₁, TIOCA₁), TP₄), ITU TP₄), ITU TP₄), ITU
CS₄ to CS₆ output, address output (A₂₃ input and input and input and
and generic input/ to A₂₁), CS₄ to CS₆ output output output
output
output, and generic (TIOCA₂, (TIOCA₂, (TIOCA₂,
input/output
TIOCB₁, TIOCB₁, TIOCB₁,
TIOCA₁), TIOCA₁), TIOCA₁),
CS₄ to address and
CS₆
output generic
output, (A₂₃ to input/
and
A₂₁), CS₄ output
generic to CS₆
input/ output,
output and
generic
input/out
put
Rev. 3.00 Sep 27, 2006 page 261 of 872
REJ09B0325-0300