HD64F3048VTF8 Datasheet, PDF (154/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 6 Bus Controller
6.1.4 Register Configuration
Table 6.2 summarizes the bus controller’s registers.
Table 6.2 Bus Controller Registers
Address^* Name
H'FFEC Bus width control register
H'FFED Access state control register
H'FFEE
Wait control register
H'FFEF
Wait state controller enable
register
H'FFF3
Bus release control register
H'FF5F
Chip select control register
Note: * Lower 16 bits of the address.
Abbreviation R/W
ABWCR
R/W
ASTCR
R/W
WCR
R/W
WCER
R/W
BRCR
R/W
CSCR
R/W
Initial Value
Modes Modes
1, 3, 5, 6 2, 4, 7
H'FF
H'00
H'FF
H'FF
H'F3
H'F3
H'FF
H'FF
H'FE
H'0F
H'FE
H'0F
6.2 Register Descriptions
6.2.1 Bus Width Control Register (ABWCR)
ABWCR is an 8-bit readable/writable register that selects 8-bit or 16-bit access for each area.
Bit
7
ABW7
Initial ^{Modes 1, 3, 5, 6 1}
value _{Modes 2, 4, 7 0}
Read/Write
R/W
6
ABW6
1
0
R/W
5
ABW5
1
0
R/W
4
ABW4
1
0
R/W
3
ABW3
1
0
R/W
2
ABW2
1
0
R/W
1
ABW1
1
0
R/W
0
ABW0
1
0
R/W
Bits selecting bus width for each area
When ABWCR contains H'FF (selecting 8-bit access for all areas), the chip operates in 8-bit bus
mode: the upper data bus (D₁₅ to D₈) is valid, and port 4 is an input/output port. When at least one
bit is cleared to 0 in ABWCR, the chip operates in 16-bit bus mode with a 16-bit data bus (D₁₅ to
D₀). In modes 1, 3, 5, and 6 ABWCR is initialized to H'FF by a reset and in hardware standby
mode. In modes 2, 4, and 7 ABWCR is initialized to H'00 by a reset and in hardware standby
mode. ABWCR is not initialized in software standby mode.
Rev. 3.00 Sep 27, 2006 page 126 of 872
REJ09B0325-0300