HD64F3048VTF8 Datasheet, PDF (885/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Hardware
standby
PA₇
Software standby
External bus released
Appendix C I/O Port Block Diagrams
Reset
R
Q
D
PA₇DDR
C
WPAD
Reset
R
Q
D
PA₇DR
C
Bus controller
Address
output
enable
TPC
TPC output
enable
Next data
Output trigger
ITU
Output enable
Compare match
output
PRA
Legend:
WPAD: Write to PADDR
WPA: Write to port A
RPA: Read port A
Figure C.10 (d) Port A Block Diagram (Pin PA₇)
Input capture
Rev. 3.00 Sep 27, 2006 page 857 of 872
REJ09B0325-0300