HD64F3048VTF8 Datasheet, PDF (384/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 10 16-Bit Integrated Timer Unit (ITU)
10.3.2 8-Bit Accessible Registers
The registers other than the timer counters, general registers, and buffer registers are 8-bit
registers. These registers are linked to the CPU by an internal 8-bit data bus.
Figures 10.12 and 10.13 show examples of byte read and write access to a TCR.
If a word-size data transfer instruction is executed, two byte transfers are performed.
On-chip data bus
H
CPU L
Bus interface
H
L
Module
data bus
TCR
Figure 10.12 Access to Timer Counter (CPU Writes to TCR)
On-chip data bus
H
CPU L
Bus interface
H
L
Module
data bus
TCR
Figure 10.13 Access to Timer Counter (CPU Reads TCR)
Rev. 3.00 Sep 27, 2006 page 356 of 872
REJ09B0325-0300