HD64F3048VTF8 Datasheet, PDF (174/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 6 Bus Controller
Inserted by WAIT signal
T₁
T₂
T_W
T_W
T₃
φ
*
*
*
WAIT pin
Address bus
External address
AS
Read
access
RD
Data bus
Read data
Write
access
HWR, LWR
Data bus
Write data
Note: * Arrows indicate time of sampling of the WAIT pin.
Figure 6.12 Pin Wait Mode 0
Wait Modes in Areas Where Wait-State Controller is Enabled
External three-state access areas in which the wait-state controller is enabled (ASTn = 1, WCEn =
1) can operate in pin wait mode 1, pin auto-wait mode, or programmable wait mode, as selected by
bits WMS1 and WMS0. Bits WMS1 and WMS0 apply to all areas, so all areas in which the wait-
state controller is enabled operate in the same wait mode.
Pin Wait Mode 1: In all accesses to external three-state-access areas, the number of wait states
(T_W) selected by bits WC1 and WC0 are inserted. If the WAIT pin is low at the fall of the system
clock (φ) in the last of these wait states, an additional wait state is inserted. If the WAIT pin
remains low, wait states continue to be inserted until the WAIT signal goes high.
Pin wait mode 1 is useful for inserting four or more wait states, or for inserting different numbers
of wait states for different external devices.
If the wait count is 0, this mode operates in the same way as pin wait mode 0.
Rev. 3.00 Sep 27, 2006 page 146 of 872
REJ09B0325-0300