HD64F3048VTF8 Datasheet, PDF (162/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 6 Bus Controller
Chip select signals (CS₇ to CS₀) can be output for areas 7 to 0. The bus specifications for each area
can be selected in ABWCR, ASTCR, WCER, and WCR as shown in table 6.3.
Table 6.3 Bus Specifications
ABWCR ASTCR WCER
WCR
ABWn
0
ASTn
0
1
1
0
1
Note: n = 0 to 7
WCEn
—
0
1
—
0
1
WMS1 WMS0
—
—
—
—
0
0
1
1
0
1
—
—
—
—
0
0
1
1
0
1
Bus
Width
16
16
16
16
16
16
8
8
8
8
8
8
Bus Specifications
Access
States Wait Mode
2
Disabled
3
Pin wait mode 0
3
Programmable wait mode
3
Disabled
3
Pin wait mode 1
3
Pin auto-wait mode
2
Disabled
3
Pin wait mode 0
3
Programmable wait mode
3
Disabled
3
Pin wait mode 1
3
Pin auto-wait mode
Rev. 3.00 Sep 27, 2006 page 134 of 872
REJ09B0325-0300