HD64F3048VTF8 Datasheet, PDF (883/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Appendix C I/O Port Block Diagrams
Reset
R
Q
D
PA_n DDR
C
WPAD
Reset
TPC
R
TPC
output
PA _n
Q
D
PA_n DR
enable
Next
C
data
WPA
Output
trigger
ITU
Output
enable
Compare
match
output
RPA
Legend:
WPAD: Write to PADDR
WPA: Write to port A
RPA: Read port A
Note: n = 2 and 3
Figure C.10 (b) Port A Block Diagram (Pins PA₂ and PA₃)
Input
capture
Counter
clock
input
Rev. 3.00 Sep 27, 2006 page 855 of 872
REJ09B0325-0300