HD64F3048VTF8 Datasheet, PDF (175/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 6 Bus Controller
Figure 6.13 shows the timing when the wait count is 1 (WC1 = 0, WC0 = 1) and one additional
wait state is inserted by WAIT input.
Inserted by Inserted by
wait count WAIT signal
T₁
T₂
T_W
T_W
T₃
φ
*
*
WAIT pin
Address bus
External address
AS
Read
access
RD
Data bus
Read data
Write
access
HWR, LWR
Data bus
Write data
Note: * Arrows indicate time of sampling of the WAIT pin.
Figure 6.13 Pin Wait Mode 1
Rev. 3.00 Sep 27, 2006 page 147 of 872
REJ09B0325-0300