HD64F3048VTF8 Datasheet, PDF (128/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 5 Interrupt Controller
Bit 7—Priority Level B7 (IPRB7): Selects the priority level of ITU channel 3 interrupt requests.
Bit 7: IPRB7
0
1
Description
ITU channel 3 interrupt requests have priority level 0 (low priority) (Initial value)
ITU channel 3 interrupt requests have priority level 1 (high priority)
Bit 6—Priority Level B6 (IPRB6): Selects the priority level of ITU channel 4 interrupt requests.
Bit 6: IPRB6
0
1
Description
ITU channel 4 interrupt requests have priority level 0 (low priority) (Initial value)
ITU channel 4 interrupt requests have priority level 1 (high priority)
Bit 5—Priority Level B5 (IPRB5): Selects the priority level of DMAC interrupt requests
(channels 0 and 1).
Bit 5: IPRB5
0
1
Description
DMAC interrupt requests (channels 0 and 1) have priority level 0 (low priority)
(Initial value)
DMAC interrupt requests (channels 0 and 1) have priority level 1 (high priority)
Bit 4—Reserved: This bit can be written and read, but it does not affect interrupt priority.
Rev. 3.00 Sep 27, 2006 page 100 of 872
REJ09B0325-0300