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HD64F3048VTF8 Datasheet, PDF (628/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip
Section 18 ROM (H8/3048F-ONE: Single Power Supply, H8/3048B Mask ROM Version)
Notes: 1. Normally do not apply a high level to the FWE pin. Apply a high level to the FWE pin
only when programming/erasing flash memory (including flash memory emulation by
RAM).
Also, while a high level is input to the FWE pin, the watchdog timer should be
activated to prevent overprogramming or overerasing due to program runaway, etc.
2. When the flash memory is read normally in the user program mode, the programming/
erasing program must not be executed. Bits 6 to 0 in FLMCR1 must be cleared to 0.
18.7 Programming/Erasing Flash Memory
A software method, using the CPU, is employed to program and erase flash memory in the on-
board programming modes. There are four flash memory operating modes: program mode, erase
mode, program-verify mode, and erase-verify mode. Transitions to these modes are made by
setting the PSU, ESU, P, E, PV, and EV bits in FLMCR1 for addresses H'000000 to H'01FFFF.
The flash memory cannot be read while it is being written or erased. Install the program to control
flash memory programming and erasing (programming control program) in the on-chip RAM or in
external memory, and execute the program from there.
See section 18.11, Notes on Flash Memory Programming/Erasing, for points to be noted when
programming or erasing the flash memory. In the following operation descriptions, wait times
after setting or clearing individual bits in FLMCR1 are given as parameters; for details of the wait
times, see section 21.1.6, Flash Memory Characteristics.
Notes: 1. Operation is not guaranteed if bits SWE, ESU, PSU, EV, PV, E, and P of FLMCR1 are
set/reset by a program in flash memory in the corresponding address areas.
2. When programming or erasing, set FWE to 1 (programming/erasing will not be
executed if FWE = 0).
3. Programming should be performed in the erased state. Do not perform additional
programming on previously programmed addresses.
Rev. 3.00 Sep 27, 2006 page 600 of 872
REJ09B0325-0300