HD64F3048VTF8 Datasheet, PDF (144/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 5 Interrupt Controller
5.4.2 Interrupt Sequence
Figure 5.7 shows the interrupt sequence in mode 2 when the program code and stack are in an
external memory area accessed in two states via a 16-bit bus.
Figure 5.7 Interrupt Sequence (Mode 2, Two-State Access, Stack in External Memory)
Rev. 3.00 Sep 27, 2006 page 116 of 872
REJ09B0325-0300