HD64F3048VTF8 Datasheet, PDF (737/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

2. Arithmetic instructions
Mnemonic
Operation
Appendix A Instruction Set
Addressing Mode and
Instruction Length (bytes)
Condition Code
No. of
States^*1
ADD.B #xx:8, Rd
ADD.B Rs, Rd
ADD.W #xx:16, Rd
ADD.W Rs, Rd
ADD.L #xx:32, ERd
ADD.L ERs, ERd
ADDX.B #xx:8, Rd
ADDX.B Rs, Rd
ADDS.L #1, ERd
ADDS.L #2, ERd
ADDS.L #4, ERd
INC.B Rd
INC.W #1, Rd
INC.W #2, Rd
INC.L #1, ERd
INC.L #2, ERd
DAA Rd
SUB.B Rs, Rd
SUB.W #xx:16, Rd
SUB.W Rs, Rd
SUB.L #xx:32, ERd
SUB.L ERs, ERd
SUBX.B #xx:8, Rd
SUBX.B Rs, Rd
SUBS.L #1, ERd
SUBS.L #2, ERd
SUBS.L #4, ERd
DEC.B Rd
DEC.W #1, Rd
DEC.W #2, Rd
B Rd8+#xx:8 → Rd8
B Rd8+Rs8 → Rd8
W Rd16+#xx:16 → Rd16
W Rd16+Rs16 → Rd16
L ERd32+#xx:32 →
ERd32
2
2
4
2
6
L ERd32+ERs32 →
2
ERd32
B Rd8+#xx:8 +C → Rd8
B Rd8+Rs8 +C → Rd8
L ERd32+1 → ERd32
L ERd32+2 → ERd32
L ERd32+4 → ERd32
B Rd8+1 → Rd8
W Rd16+1 → Rd16
W Rd16+2 → Rd16
L ERd32+1 → ERd32
L ERd32+2 → ERd32
B Rd8 decimal adjust
→ Rd8
2
2
2
2
2
2
2
2
2
2
2
B Rd8−Rs8 → Rd8
2
W Rd16−#xx:16 → Rd16
4
W Rd16−Rs16 → Rd16
2
L ERd32−#xx:32 → ERd32 6
L ERd32−ERs32 → ERd32
2
B Rd8−#xx:8−C → Rd8
2
B Rd8−Rs8−C → Rd8
2
L ERd32−1 → ERd32
2
L ERd32−2 → ERd32
2
L ERd32−4 → ERd32
2
B Rd8−1 → Rd8
2
W Rd16−1 → Rd16
2
W Rd16−2 → Rd16
2
I HNZVC

2

2
 (1)
4
 (1)
2
 (2)
6
 (2)
2

(3)
2

(3)
2
 2
 2
 2

2

2

2

2

2
*
* 2

2
 (1)
4
 (1)
2
 (2)
6
 (2)
2

(3)
2

(3)
2
 2
 2
 2

2

2

2
Rev. 3.00 Sep 27, 2006 page 709 of 872
REJ09B0325-0300