HD64F3048VTF8 Datasheet, PDF (101/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 3 MCU Operating Modes
Bits 7 and 6—Reserved: Read-only bits, always read as 1.
Bits 5 to 3—Reserved: Read-only bits, always read as 0.
Bits 2 to 0—Mode Select 2 to 0 (MDS2 to MDS0): These bits indicate the logic levels at pins
MD₂ to MD₀ (the current operating mode). MDS2 to MDS0 correspond to MD₂ to MD₀. MDS2 to
MDS0 are read-only bits. The mode pin (MD₂ to MD₀) levels are latched into these bits when
MDCR is read.
Note: For the flash memory version with single power supply (H8/3048F-ONE), flash memory
can be written to in the boot mode. In the boot mode, the inverted value of the MD2 signal
is set to bit MDS2.
3.3 System Control Register (SYSCR)
SYSCR is an 8-bit register that controls the operation of the H8/3048B Group.
Bit
7
6
5
4
3
2
1
0
SSBY STS2 STS1 STS0 UE NMIEG  RAME
Initial value
0
0
0
0
1
0
1
1
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W

R/W
RAM enable
Enables or
disables
on-chip RAM
Reserved bit
NMI edge select
Selects the valid edge
of the NMI input
User bit enable
Selects whether to use the UI bit in CCR
as a user bit or an interrupt mask bit
Standby timer select 2 to 0
These bits select the waiting time at
recovery from software standby mode
Software standby
Enables transition to software standby mode
Rev. 3.00 Sep 27, 2006 page 73 of 872
REJ09B0325-0300