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HD64F3048VTF8 Datasheet, PDF (313/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip
Section 9 I/O Ports
9.8.2 Register Description
Table 9.12 summarizes the port 7 register. Port 7 is an input-only port, so it has no data direction
register.
Table 9.12 Port 7 Data Register
Address* Name
H'FFCE
Port 7 data register
Note: * Lower 16 bits of the address.
Abbreviation R/W
P7DR
R
Initial Value
Undetermined
Port 7 Data Register (P7DR)
Bit
7
6
5
4
3
2
1
0
P77
P76
P75
P74
P73
P72
P71
P70
Initial value
*
*
*
*
*
*
*
*
Read/Write
R
R
R
R
R
R
R
R
Note: * Determined by pins P77 to P70.
When P7DR is read, the logic level of the pin is always read. No data can be written to.
Rev. 3.00 Sep 27, 2006 page 285 of 872
REJ09B0325-0300