HD64F3048VTF8 Datasheet, PDF (871/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Appendix C I/O Port Block Diagrams
Mode 7
Reset
R
Q
D
P6₁ DDR
C
WP6D
Reset
R
Bus
controller
Bus release
enable
P6 ₁
Q
D
P6₁ DR
C
WP6
RP6
Legend:
WP6D: Write to P6DDR
WP6: Write to port 6
RP6: Read port 6
Figure C.6 (b) Port 6 Block Diagram (Pin P6₁)
BREQ input
Rev. 3.00 Sep 27, 2006 page 843 of 872
REJ09B0325-0300