HD64F3048VTF8 Datasheet, PDF (403/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 10 16-Bit Integrated Timer Unit (ITU)
Example of Reset-Synchronized PWM Mode
Figure 10.32 shows an example of operation in reset-synchronized PWM mode. TCNT3 operates
as an up-counter in this mode. TCNT4 operates independently, detached from GRA4 and GRB4.
When TCNT3 matches GRA3, TCNT3 is cleared and resumes counting from H'0000. The PWM
outputs toggle at compare match of TCNT3 with GRB3, GRA4, and GRB4 respectively, and all
toggle when the counter is cleared.
TCNT3 value
GRA3
GRB3
GRA4
GRB4
H'0000
Counter cleared at compare match with GRA3
Time
TIOCA₃
TIOCB₃
TIOCA₄
TOCXA₄
TIOCB₄
TOCXB₄
Figure 10.32 Operation in Reset-Synchronized PWM Mode (Example)
(when OLS3 = OLS4 = 1)
For the settings and operation when reset-synchronized PWM mode and buffer mode are both
selected, see section 10.4.8, Buffering.
Rev. 3.00 Sep 27, 2006 page 375 of 872
REJ09B0325-0300