HD64F3048VTF8 Datasheet, PDF(208/903 Page) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

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HD64F3048VTF8 Datasheet, PDF (208/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

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Section 7 Refresh Controller

Example 2: Connection to 2WE 4-Mbit DRAM (16-Mbyte Mode)

Figure 7.9 shows typical interconnections to a single 2WE 4-Mbit DRAM, and the corresponding

address map. Figure 7.10 shows a setup procedure to be followed by a program for this example.

The DRAM in this example has 10-bit row addresses and 8-bit column addresses. Its address area

is H'600000 to H'67FFFF.

H8/3048B Group

A18

A17

A8

A7

A6

A5

A4

A3

A2

A1

CS 3

RD

HWR

LWR

D15 to D 0

2WE 4-Mbit DRAM with 10-bit

row address, 8-bit column address,

and Ã 16-bit organization

A9

A8

A7

A6

A5

A4

A3

A2

A1

A0

RAS

CAS

UW

LW

OE

I/O15 to I/O 0

a. Interconnections (example)

H'600000

H'67FFFF

H'680000

DRAM area

Not used

Area 3 (16-Mbyte mode)

H'7FFFFF

b. Address map

Figure 7.9 Interconnections and Address Map for 2WE 4-Mbit DRAM (Example)

Rev. 3.00 Sep 27, 2006 page 180 of 872

REJ09B0325-0300

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