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HD64F3048VTF8 Datasheet, PDF (64/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip | |||
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Section 2 CPU
executed, the H flag is set to 1 if there is a carry or borrow at bit 11, and cleared to 0 otherwise.
When the ADD.L, SUB.L, CMP.L, or NEG.L instruction is executed, the H flag is set to 1 if
there is a carry or borrow at bit 27, and cleared to 0 otherwise.
⢠Bit 4âUser Bit (U): Can be written and read by software using the LDC, STC, ANDC, ORC,
and XORC instructions.
⢠Bit 3âNegative Flag (N): Indicates the most significant bit (sign bit) of data.
⢠Bit 2âZero Flag (Z): Set to 1 to indicate zero data, and cleared to 0 to indicate non-zero data.
⢠Bit 1âOverflow Flag (V): Set to 1 when an arithmetic overflow occurs, and cleared to 0 at
other times.
⢠Bit 0âCarry Flag (C): Set to 1 when a carry occurs, and cleared to 0 otherwise. Used by:
 Add instructions, to indicate a carry
 Subtract instructions, to indicate a borrow
 Shift and rotate instructions, to store the value shifted out of the end bit
The carry flag is also used as a bit accumulator by bit manipulation instructions.
Some instructions leave flag bits unchanged. Operations can be performed on CCR by the LDC,
STC, ANDC, ORC, and XORC instructions. The N, Z, V, and C flags are used by conditional
branch (Bcc) instructions.
For the action of each instruction on the flag bits, see appendix A.1, Instruction List. For the I and
UI bits, see section 5, Interrupt Controller.
2.4.4 Initial CPU Register Values
In reset exception handling, PC is initialized to a value loaded from the vector table, and the I bit
in CCR is set to 1. The other CCR bits and the general registers are not initialized. In particular,
the stack pointer (ER7) is not initialized. The stack pointer must therefore be initialized by an
MOV.L instruction executed immediately after a reset.
Rev. 3.00 Sep 27, 2006 page 36 of 872
REJ09B0325-0300
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