HD64F3048VTF8 Datasheet, PDF (632/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 18 ROM (H8/3048F-ONE: Single Power Supply, H8/3048B Mask ROM Version)
loops in reprogramming processing is guaranteed not to exceed the maximum value of the
maximum programming count (N).
b. After write pulse application, a verify-read is performed in program-verify mode, and
programming is judged to have been completed for bits read as 0. The following processing
is necessary for programmed bits.
When programming is completed at an early stage in the program/program-verify
procedure:
If programming is completed in the 1st to 6th reprogramming processing loop,
additional programming should be performed on the relevant bits. Additional
programming should only be performed on bits which first return 0 in a verify-read
in certain reprogramming processing.
When programming is completed at a late stage in the program/program-verify procedure:
If programming is completed in the 7th or later reprogramming processing loop, additional
programming is not necessary for the relevant bits.
c. If programming of other bits is incomplete in the 128 bytes, reprogramming process should
be executed. If a bit for which programming has been judged to be completed is read as 1
in a subsequent verify-read, a write pulse should again be applied to that bit.
5. The period for which the P bit in FLMCR1 is set (the write pulse width) should be
changed according to the degree of progress through the program/program-verify
procedure. For detailed wait time specifications, see section 21.1.6, Flash Memory
Characteristics.
Table 18.8 Wait Time after P Bit Setting
Item
Symbol Conditions
Symbol
Wait time after P t
sp
bit setting
When reprogramming loop count (n) is 1 to 6
When reprogramming loop count (n) is 7 or more
t 30
sp
t_sp200
In case of additional programming processing^*
t_sp10
Note: * Additional programming processing is necessary only when the reprogramming loop
count (n) is 1 to 6.
6. The program/program-verify flowchart for the H8/3048F-ONE is shown in figure 18.13.
To cover the points noted above, bits on which reprogramming processing is to be executed,
and bits on which additional programming is to be executed, must be determined as shown
below.
Since reprogram data and additional-programming data vary according to the progress of the
programming procedure, it is recommended that the following data storage areas (128 bytes
each) be provided in RAM.
Rev. 3.00 Sep 27, 2006 page 604 of 872
REJ09B0325-0300