HD64F3048VTF8 Datasheet, PDF (383/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

On-chip data bus
H
CPU L
Bus interface
Section 10 16-Bit Integrated Timer Unit (ITU)
H
L
Module
data bus
TCNTH TCNTL
Figure 10.9 Access to Timer Counter (CPU Writes to TCNT, Lower Byte)
On-chip data bus
H
CPU L
Bus interface
H
L
Module
data bus
TCNTH TCNTL
Figure 10.10 Access to Timer Counter (CPU Reads TCNT, Upper Byte)
On-chip data bus
H
CPU L
Bus interface
H
L
Module
data bus
TCNTH TCNTL
Figure 10.11 Access to Timer Counter (CPU Reads TCNT, Lower Byte)
Rev. 3.00 Sep 27, 2006 page 355 of 872
REJ09B0325-0300