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HD64F3048VTF8 Datasheet, PDF (744/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip | |||
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Appendix A Instruction Set
6. Branching instructions
Mnemonic
Operation
Addressing Mode and
Instruction Length (bytes)
Condition Code
No. of
States*1
BRA d:8 (BT d:8)
BRA d:16 (BT d:16)
BRN d:8 (BF d:8)
BRN d:16 (BF d:16)
BHI d:8
BHI d:16
BLS d:8
BLS d:16
BCC d:8 (BHS d:8)
BCC d:16 (BHS d:16)
BCS d:8 (BLO d:8)
BCS d:16 (BLO d:16)
BNE d:8
BNE d:16
BEQ d:8
BEQ d:16
BVC d:8
BVC d:16
BVS d:8
BVS d:16
BPL d:8
BPL d:16
BMI d:8
BMI d:16
BGE d:8
BGE d:16
BLT d:8
BLT d:16
BGT d:8
BGT d:16
BLE d:8
BLE d:16
Branch
Condition
â If condition Always
â is true then
â PC â PC+d Never
else next;
â
â
Câ¨Z=0
â
â
Câ¨Z=1
â
â
C=0
â
â
C=1
â
â
Z=0
â
â
Z=1
â
â
V=0
â
â
V=1
â
â
N=0
â
â
N=1
â
â
NâV = 0
â
â
NâV = 1
â
â
Z ⨠(NâV) = 0
â
â
Z ⨠(NâV) = 1
â
I HNZVC
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
2
 4
4
 6
Rev. 3.00 Sep 27, 2006 page 716 of 872
REJ09B0325-0300
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