HD64F3048VTF8 Datasheet, PDF (692/903 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip

Section 21 Electrical Characteristics
Item
Write data delay time
Write data setup time 1
Write data setup time 2
Write data hold time
Read data access time 1
Read data access time 2
Read data access time 3
Read data access time 4
Precharge time
Wait setup time
Wait hold time
Bus request setup time
Bus acknowledge delay
time 1
Bus acknowledge delay
time 2
Bus-floating time
Symbol
t_WDD
t_WDS1
t_WDS2
t_WDH
t_ACC1
t_ACC2
t_ACC3
t_ACC4
t_PCH
t_WTS
t_WTH
t_BRQS
t_BACD1
t_BACD2
t_BZD
Condition A
25 MHz
Min
Max
—
35
1.0t_cyc –30
0.5t_cyc –30
0.5t_cyc –15
—
—
—
—
1.0t_cyc –20
25
—
—
—
1.5t_cyc –40
2.5t_cyc –40
1.0t_cyc –28
2.0t_cyc –32
—
—
5
—
25
—
—
30
—
30
—
40
Condition B
25 MHz
Min
Max
Test
Unit Conditions
—
35
ns Figure 21.7
1.0t_cyc –30 —
0.5t_cyc –30 —
0.5t_cyc –15 —
—
1.5t_cyc –40
—
2.5t_cyc –40
—
1.0t_cyc –28
—
2.0t_cyc –32
1.0t_cyc –20 —
25
—
ns
Figure 21.8
Figure 21.9
5
—
25
—
ns Figure 21.21
—
30
—
30
—
40
Rev. 3.00 Sep 27, 2006 page 664 of 872
REJ09B0325-0300