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SH7014 Datasheet, PDF (72/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer | |||
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2. CPU
Instruction
MOV.W Rm,@(R0,Rn)
MOV.L Rm,@(R0,Rn)
MOV.B @(R0,Rm),Rn
Instruction Code
0000nnnnmmmm0101
0000nnnnmmmm0110
0000nnnnmmmm1100
MOV.W @(R0,Rm),Rn
0000nnnnmmmm1101
MOV.L @(R0,Rm),Rn
0000nnnnmmmm1110
MOV.B R0,@(disp,GBR) 11000000dddddddd
MOV.W R0,@(disp,GBR) 11000001dddddddd
MOV.L R0,@(disp,GBR) 11000010dddddddd
MOV.B @(disp,GBR),R0 11000100dddddddd
MOV.W @(disp,GBR),R0 11000101dddddddd
MOV.L @(disp,GBR),R0 11000110dddddddd
MOVA @(disp,PC),R0 11000111dddddddd
MOVT Rn
0000nnnn00101001
SWAP.B Rm,Rn
0110nnnnmmmm1000
SWAP.W Rm,Rn
0110nnnnmmmm1001
XTRCT Rm,Rn
0010nnnnmmmm1101
Operation
Rm â (R0 + Rn)
Rm â (R0 + Rn)
(R0 + Rm) â Sign
extension â Rn
(R0 + Rm) â Sign
extension â Rn
(R0 + Rm) â Rn
R0 â (disp + GBR)
R0 â (disp à 2 + GBR)
R0 â (disp à 4 + GBR)
(disp + GBR) â Sign
extension â R0
(disp à 2 + GBR) â
Sign extension â R0
(disp à 4 + GBR) â R0
disp à 4 + PC â R0
T â Rn
Rm â Swap the bottom
two bytes â Rn
Rm â Swap two
consecutive words â
Rn
Rm: Middle 32 bits of
Rn â Rn
Exec.
Cycles
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
T Bit
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
â¯
Rev.5.00 Sep. 27, 2007 Page 38 of 716
REJ09B0398-0500
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