SH7014 Datasheet, PDF (641/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
CAC
Cache Control Register (CCR)
Item
15
14
Bit name
―
―
Initial value
*
*
R/W
R
R
Item
7
6
Bit name
―
―
Initial value
*
*
R/W
R
R
Note: * Undefined
H'FFFF8740
8/16/32
Bit
13
12
11
10
9
8
―
―
―
―
―
―
*
*
*
*
*
*
R
R
R
R
R
R
5
4
3
2
1
0
―
CEDRAM CECS3 CECS2 CECS1 CECS0
*
0
0
0
0
0
R
R/W
R/W
R/W
R/W
R/W
Bit
Name
4
DRAM Space Cache Enable
(CEDRAM)
3
CS3 Space Cache Enable
(CECS3)
2
CS2 Space Cache Enable
(CECS2)
1
CS1 Space Cache Enable
(CECS1)
0
CS0 Space Cache Enable
(CECS0)
Value
0
1
0
1
0
1
0
1
0
1
Description
DRAM space cache disabled
DRAM space cache enabled
CS3 space cache disabled
CS3 space cache enabled
CS2 space cache disabled
CS2 space cache enabled
CS1 space cache disabled
CS1 space cache enabled
CS0 space cache disabled
CS0 space cache enabled
(initial value)
(initial value)
(initial value)
(initial value)
(initial value)
Rev.5.00 Sep. 27, 2007 Page 607 of 716
REJ09B0398-0500