SH7014 Datasheet, PDF (696/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
Bit
Name
14 PA15 Mode (PA15MD)
12 PA14 Mode (PA14MD)
10 PA13 Mode (PA13MD)
8
PA12 Mode (PA12MD)
6
PA11 Mode (PA11MD)
4
PA10 Mode (PA10MD)
3, 2 PA9 Mode 1, 0
(PA9MD1 and PA9MD0)
1, 0 PA8 Mode 1, 0
(PA8MD1 and PA8MD0)
PFC
Value
0
1
0
1
0
1
0
1
0
1
0
1
00
1
10
1
00
1
10
1
Description
General input/output (PA15)
(single chip mode initial value)
Clock output (CK) (extended mode initial value)
General input/output (PA14)
(RD in on-chip ROM invalid mode)
(initial value)
Read output (RD) (PA14 in single chip mode)
General input/output (PA13)
(WRH in on-chip ROM invalid mode)
(initial value)
Most significant side write output (WRH)
(PA13 in single chip mode)
General input/output (PA12)
(WRL in on-chip ROM invalid mode)
(initial value)
Least significant side write output (WRL)
(PA12 in single chip mode)
General input/output (PA11)
(CS1 in on-chip ROM invalid mode)
(initial value)
Chip select output (CS1) (PA11 in single chip mode)
General input/output (PA10)
(CS0 in on-chip ROM invalid mode)
(initial value)
Chip select output (CS0) (PA10 in single chip mode)
General input/output (PA9)
(initial value)
MTU timer clock input (TCLKD)
Interrupt request input (IRQ3)
Reserved
General input/output (PA8)
(initial value)
MTU timer clock input (TCLKC)
Interrupt request input (IRQ2)
Reserved
Rev.5.00 Sep. 27, 2007 Page 662 of 716
REJ09B0398-0500