SH7014 Datasheet, PDF (691/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
A/D (SH7016, SH7017)
A/D Data Register A to D (ADDRA to ADDRD)
H'FFFF8420
8/16
H'FFFF8422
H'FFFF8424
H'FFFF8426
Bit
Item
15 14 13 12 11 10 9 8 7 6
54
3210
Bit name AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 ― ― ― ― ― ―
Initial value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W
RRRRRRRRRRRRRRRR
A/D Control/Status Register (ADCSR)
H'FFFF8428
Bit
Item
7
6
5
4
Bit name ADF
ADIE
ADST
SCAN
Initial value
0
0
0
0
R/W
R/(W)*
R/W
R/W
R/W
Note: * Only 0 can be written to bit 7 to clear the flag.
3
CKS
0
R/W
2
CH2
0
R/W
8/16
1
CH1
0
R/W
0
CH0
0
R/W
Bit
Name
7
A/D End Flag (ADF)
6
A/D Interrupt Enable (ADIE)
Value
0
1
0
1
Description
Clear conditions:
(initial value)
1. Writing 0 to ADF after reading ADF with ADF
=1
2. When registers of the mid-speed converter
are accessed after the DMAC is activated by
ADI interrupt
Set conditions:
1. Single mode: When A/D conversion is
complete
2. Scan mode: When A/D conversion of all
designated channels are complete
Disables interrupt request (ADI) due to
completion of A/D conversion
(initial value)
Enables interrupt request (ADI) due to
completion of A/D conversion
Rev.5.00 Sep. 27, 2007 Page 657 of 716
REJ09B0398-0500