SH7014 Datasheet, PDF (142/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

8. Bus State Controller (BSC)
Bits 7 to 4⎯Reserved: These bits read 0 after a reset. The write value should always be 0.
Operation is not guaranteed if the write value is 1.
Bit 3⎯CS3 Space Size Specification (A3SZ): Specifies the CS3 space bus size. This is effective
only when CS3 space is ordinary space. When CS3 space is an address/data multiplex I/O space,
bus size is decided by the A14 bit.
Bit 3
A3SZ
0
1
Description
Byte (8-bit) size
Word (16-bit) size
(initial value)
Bit 2⎯CS2 Space Size Specification (A2SZ): Specifies the CS2 space bus size.
Bit 2
A2SZ
0
1
Description
Byte (8-bit) size
Word (16-bit) size
(initial value)
Bit 1⎯CS1 Space Size Specification (A1SZ): Specifies the CS1 space bus size.
Bit 1
A1SZ
0
1
Description
Byte (8-bit) size
Word (16-bit) size
(initial value)
Bit 0⎯CS0 Space Size Specification (A0SZ): Specifies the CS0 space bus size.
Bit 0
A0SZ
Description
0
Byte (8-bit) size
1
Word (16-bit) size
(initial value)
Note: A0SZ is effective only in on-chip ROM effective mode. In on-chip ROM ineffective mode,
the CS0 space bus size is specified by the mode pin.
Rev.5.00 Sep. 27, 2007 Page 108 of 716
REJ09B0398-0500