SH7014 Datasheet, PDF (436/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

14. Mid-Speed A/D Converter ⎯ SH7016, SH7017 ⎯
14.2.2 A/D Control/Status Register (ADCSR)
Bit : 7
ADF
Initial value : 0
R/W : R/(W)*
6
ADIE
0
R/W
5
ADST
0
R/W
4
SCAN
0
R/W
3
CKS
0
R/W
2
CH2
0
R/W
1
CH1
1
R/W
0
CH0
0
R/W
Note: * Only 0 can be written to clear the flag.
The A/D control/status register (ADCSR) is register that can read/write in 8 bits and control mid-
speed A/D converter operations such as mode selection.
The ADCSR is initialized to H'00 during power-on reset.
Bit 7⎯A/D End Flag (ADF): Status flag that indicates end of A/D conversion.
Bit 7
ADF
0
1
Description
[Clear conditions]
(Initial value)
1. Writing 0 to ADF after reading ADF with ADF = 1
2. When registers of the mid-speed converter are accessed after the DMAC is
activated by ADI interrupt.
[Set conditions]
1. Single mode: When A/D conversion is complete
2. Scan mode: When A/D conversion of all designated channels are complete
Bit 6⎯A/D Interrupt Enable (ADIE): Enables or disables interrupt request (ADI) due to
completion of A/D conversion.
Bit 6
ADIE
0
1
Description
Disables interrupt request (ADI) due to completion of A/D conversion
Enables interrupt request (ADI) due to completion of A/D conversion
(Initial value)
Rev.5.00 Sep. 27, 2007 Page 402 of 716
REJ09B0398-0500