SH7014 Datasheet, PDF (121/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

6.4.2 Stack after Interrupt Exception Processing
Figure 6.4 shows the stack after interrupt exception processing.
6. Interrupt Controller (INTC)
Address
4n–8
4n–4
4n
PC*¹
SR
32 bits
32 bits
SP*²
Notes: 1. PC: Start address of the next instruction (return destination instruction)
after the executing instruction
2. Always be certain that SP is a multiple of 4
Figure 6.4 Stack after Interrupt Exception Processing
Rev.5.00 Sep. 27, 2007 Page 87 of 716
REJ09B0398-0500