SH7014 Datasheet, PDF (294/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Multifunction Timer Pulse Unit (MTU)
Setting Timing for Overflow Flag (TCFV)/Underflow Flag (TCFU): Figure 10.45 shows
timing for the TCFV flag of the timer status register (TSR) due to overflow, as well as TCIV
interrupt request signal timing. Figure 10.46 shows timing for the TCFU flag of the timer status
register (TSR) due to underflow, as well as TCIU interrupt request signal timing.
φ
TCNT
input clock
TCNT
(underflow)
Overflow
signal
TCFV flag
H'FFFF
H'0000
TCIV interrupt
φ
TCNT
input clock
TCNT
(underflow)
Underflow
signal
TCFU flag
Figure 10.45 TCIV Interrupt Setting Timing
H'0000
H'FFFF
TCIU interrupt
Figure 10.46 TCIU Interrupt Setting Timing
Rev.5.00 Sep. 27, 2007 Page 260 of 716
REJ09B0398-0500