SH7014 Datasheet, PDF (346/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

12. Serial Communication Interface (SCI)
Bit 2⎯Multiprocessor Mode (MP): Selects multiprocessor format. When multiprocessor format
is selected, settings of the parity enable (PE) and parity mode (O/E) bits are ignored. The MP bit
setting is used only in the asynchronous mode; it is ignored in the clock synchronous mode. For
the multiprocessor communication function, see section 12.3.3, Multiprocessor Communication.
Bit 2
MP
0
1
Description
Multiprocessor function disabled
Multiprocessor format selected
(initial value)
Bits 1 and 0⎯Clock Select 1 and 0 (CKS1 and CKS0): These bits select the internal clock
source of the on-chip baud rate generator. Four clock sources are available; φ, φ/4, φ/16, or φ/64.
For further information on the clock source, bit rate register settings, and baud rate, see section
12.2.8, Bit Rate Register.
Bit 1
CKS1
0
1
Bit 0
CKS0
0
1
0
1
Description
φ
φ/4
φ/16
φ/64
(initial value)
12.2.6 Serial Control Register (SCR)
Bit: 7
6
5
TIE
RIE
TE
Initial value: 0
0
0
R/W: R/W R/W R/W
4
3
2
1
0
RE MPIE TEIE CKE1 CKE0
0
0
0
0
0
R/W R/W R/W R/W R/W
The serial control register (SCR) operates the SCI transmitter/receiver, selects the serial clock
output in the asynchronous mode, enables/disables interrupt requests, and selects the
transmit/receive clock source. The CPU can always read and write the SCR. The SCR is initialized
to H'00 by a power-on reset or in standby mode.
Rev.5.00 Sep. 27, 2007 Page 312 of 716
REJ09B0398-0500