SH7014 Datasheet, PDF (337/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Watchdog Timer (WDT)
11.4.4 System Reset with WDTOVF
If a WDTOVF signal is input to the RES pin, the LSI cannot initialize correctly.
Avoid logical input of the WDTOVF output signal to the RES input pin. To reset the entire system
with the WDTOVF signal, use the circuit shown in figure 11.9.
SH7014/16/17
Reset input
RES
Reset signal to
entire system
WDTOVF
Figure 11.9 Example of a System Reset Circuit with a WDTOVF Signal
11.4.5 Internal Reset with the Watchdog Timer
If the RSTE bit is cleared to 0 in the watchdog timer mode, the LSI will not reset internally when a
TCNT overflow occurs, but the TCNT and TCSR in the WDT will reset.
Rev.5.00 Sep. 27, 2007 Page 303 of 716
REJ09B0398-0500