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SH7014 Datasheet, PDF (7/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer
Main Revisions for This Edition
Item
All
Page
—
1.2 Block Diagram 6
Figure 1.1 Block
Diagram of the SH7014
Revision (See Manual for Details)
Company name and brand names amended
(Before) Hitachi, Ltd. → (After) Renesas Technology Corp.
Description of DTC deleted
Figure amended
Figure 1.2 Block
7
Diagram of the SH7016,
SH7017
RES
WDTOVF
MD3
A15
MD2
A14
MD1
A13
MD0
NMI
EXTAL
XTAL
PLLVCC
RAM (3 kB)/
A12
cache (1 kB)
A11
A10
A9
A8
PLLCAP
A7
PLLVSS
VCC
VCC
A6
CPU
A5
Direct memory
A4
VCC
access controller
A3
VCC
A2
VCC
VSS
Interrupt
controller
Bus state controller
A1
A0
VSS
VSS
VSS
VSS
VSS
Serial communi-
cation interface
(×2 channels)
Multifunction timer/
pulse unit
D15
D14
D13
VSS
VSS
VSS
Compare match
timer (×2 channels)
A/D
converter
Watch-
dog
timer
D12
D11
D10
VSS
D9
VSS
D8
AVCC
D7
AVSS
D6
D5
D4
D3
D2
D1
D0
: Peripheral address bus
: Peripheral data bus
: Internal address bus
: Internal upper data bus
: Internal lower data bus
Note amended
Note: * VCC in the SH7016, FWP in the SH7017 (except
FWE pin in the programmer mode).
Rev.5.00 Sep. 27, 2007 Page vii of xxxiv
REJ09B0398-0500