SH7014 Datasheet, PDF (186/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

9. Direct Memory Access Controller (DMAC)
9.2.2 DMA Destination Address Registers 0, 1 (DAR0, DAR1)
DMA destination address registers 0, 1 (DAR0, DAR1) are 32-bit read/write registers that specify
the destination address of a DMA transfer. These registers have a count function, and during a
DMA transfer, they indicate the next destination address. In single-address mode, DAR values are
ignored when a device with DACK has been specified as the transfer destination.
Specify a 16-bit or 32-bit boundary address when doing 16-bit or 32-bit data transfers. Operation
cannot be guaranteed on any other address. The initial value after power-on resets or in software
standby mode, is undefined.
Bit: 31
30
29
28
27
26
25
24
Initial value: ⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 23
22
21
…
…
Initial value: ⎯
⎯
⎯
…
R/W: R/W R/W R/W
…
…
2
1
0
…
…
⎯
⎯
⎯
…
R/W R/W R/W
Rev.5.00 Sep. 27, 2007 Page 152 of 716
REJ09B0398-0500