SH7014 Datasheet, PDF (697/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A On-Chip Supporting Module Registers
PFC
Port A Control Register L2 (PACRL2)
H'FFFF838E
H'FFFF838F
8/16/32
Bit
Item
15
14
13
12
11
10
9
Bit name PA7MD1 PA7MD0 PA6MD1 PA6MD0 PA5MD1 PA5MD0
―
Initial value
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Item
7
6
5
4
3
2
1
Bit name
―
PA3MD PA2MD1 PA2MD0
―
PA1MD
―
Initial value
0
0
0
0
0
0
0
R/W
R
R/W
R/W
R/W
R
R/W
R
8
PA4MD
0
R/W
0
PA0MD
0
R/W
Bit
15, 14
Name
PA7 Mode 1, 0
(PA7MD1 and PA7MD0)
13, 12 PA6 Mode 1, 0
(PA6MD1 and PA6MD0)
11, 10 PA5 Mode 1, 0
(PA5MD1 and PA5MD0)
8
PA4 Mode (PA4MD)
6
PA3 Mode (PA3MD)
5, 4 PA2 Mode 1, 0
(PA2MD1 and PA2MD0)
Value
00
1
10
1
00
1
10
1
00
1
10
1
0
1
0
1
00
1
10
1
Description
General input/output (PA7)
(initial value)
MTU timer clock input (TCLKB)
Chip select output (CS3) (PA7 in single-chip mode)
Reserved
General input/output (PA6)
(initial value)
MTU timer clock input (TCLKA)
Chip select output (CS2) (PA6 in single-chip mode)
Reserved
General input/output (PA5)
(initial value)
Serial clock input/output (SCK1)
DMA transfer request received input (DREQ1)
(PA5 in single-chip mode)
Interrupt request input (IRQ1)
General input/output (PA4)
(initial value)
Transmit data output (TxD1)
General input/output (PA3)
(initial value)
Receive data input (RxD1)
General input/output (PA2)
(initial value)
Serial clock input/output (SCK0)
DMA transfer request received input (DREQ0)
(PA2 in single-chip mode)
Interrupt request input (IRQ0)
Rev.5.00 Sep. 27, 2007 Page 663 of 716
REJ09B0398-0500