SH7014 Datasheet, PDF (240/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Multifunction Timer Pulse Unit (MTU)
Bits 7 to 4⎯I/O Control B3 to B0 (IOB3 to IOB0): These bits set the TGRB register function.
Bits 3 to 0⎯I/O Control A3 to B0 (IOA3 to IOA0): These bits set the TGRA register function.
Channel 0: TIOR0L
Bit: 7
6
5
4
3
2
1
0
IOD3 IOD2 IOD1 IOD0 IOC3 IOC2 IOC1 IOC0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Note: When the TGRC or TGRD registers are set for buffer operation, these settings become
ineffective and the operation is as a buffer register.
Bits 7 to 4⎯I/O Control D3 to D0 (IOD3 to IOD0): These bits set the TGRD register function.
Bits 3 to 0⎯I/O Control C3 to C0 (IOC3 to IOC0): These bits set the TGRC register function.
Rev.5.00 Sep. 27, 2007 Page 206 of 716
REJ09B0398-0500