SH7014 Datasheet, PDF (65/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

2. CPU
Instruction Formats
nm format
15
0
xxxx nnnn mmmm xxxx
md format
15
0
xxxx xxxx mmmm dddd
nd4 format
15
xxxx xxxx
0
nnnn dddd
nmd format
15
0
xxxx nnnn mmmm dddd
Source
Operand
Destination
Operand
mmmm: Direct
register
nnnn: Direct
register
mmmm: Direct
register
nnnn: Indirect
register
mmmm: Indirect
post-increment
register (multiply/
accumulate)
nnnn*: Indirect
post-increment
register (multiply/
accumulate)
MACH, MACL
mmmm: Indirect
post-increment
register
nnnn: Direct
register
mmmm: Direct
register
nnnn: Indirect pre-
decrement
register
mmmm: Direct
register
nnnn: Indirect
indexed register
mmmmdddd:
indirect register
with
displacement
R0 (Direct
register)
R0 (Direct
register)
nnnndddd:
Indirect register
with displacement
Example
ADD Rm,Rn
MOV.L Rm,@Rn
MAC.W
@Rm+,@Rn+
MOV.L @Rm+,Rn
MOV.L Rm,@-Rn
MOV.L
Rm,@(R0,Rn)
MOV.B
@(disp,Rm),R0
MOV.B
R0,@(disp,Rn)
mmmm: Direct
register
nnnndddd: Indirect MOV.L
register with
Rm,@(disp,Rn)
displacement
mmmmdddd:
Indirect register
with
displacement
nnnn: Direct
register
MOV.L
@(disp,Rm),Rn
Rev.5.00 Sep. 27, 2007 Page 31 of 716
REJ09B0398-0500