SH7014 Datasheet, PDF (69/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Operation
Classification Types Code
Function
System control 11 CLRT
T bit clear
CLRMAC MAC register clear
LDC
Load to control register
LDS
Load to system register
NOP
No operation
RTE
Return from exception processing
SETT
T bit set
SLEEP Shift into power-down mode
STC
Storing control register data
STS
Storing system register data
TRAPA Trap exception handling
Total: 62
2. CPU
No. of
Instructions
31
142
Table 2.11 shows the format used in tables 2.12 to 2.17, which list instruction codes, operation,
and execution states in order by classification.
Rev.5.00 Sep. 27, 2007 Page 35 of 716
REJ09B0398-0500