SH7014 Datasheet, PDF (124/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

6. Interrupt Controller (INTC)
6.6 Data Transfer with Interrupt Request Signals
The following data transfers can be done using interrupt request signals:
• Activate DMAC only, without generating CPU interrupt
Among interrupt sources, those designated as DMAC activating sources are masked and not input
to the INTC. The masking condition is listed below:
Mask condition = DME × (DE0 × source selection 0 + DE1)
Figure 6.6 shows a control block diagram.
Interrupt source
Interrupt source
flag clear
(by DMAC)
DMAC
Interrupt source
(those not designated as DMAC activating sources)
CPU interrupt request
Figure 6.6 Interrupt Control Block Diagram
6.6.1 Handling DMAC Activating Sources but Not CPU Interrupt Sources
1. Select the DMAC as a source and set the DME bit to 1. CPU interrupt sources and DTC
activating sources are masked regardless of the interrupt priority level register settings or DTC
register settings.
2. Activating sources are applied to the DMAC when interrupts occur.
3. The DMAC clears activating sources at the time of data transfer.
6.6.2 Treating CPU Interrupt Sources but Not DMAC Activating Sources
1. Either do not select the DMAC as a source, or clear the DME bit to 0.
2. When interrupts occur, interrupt requests are sent to the CPU.
3. The CPU clears the interrupt source and performs the necessary processing in the interrupt
processing routine.
Rev.5.00 Sep. 27, 2007 Page 90 of 716
REJ09B0398-0500