SH7014 Datasheet, PDF (17/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Item
17.6.2 Port E Data
Register (PEDR)
17.7.2 Port F Data
Register (PFDR)
18.4 Register
Configuration
Table 18.3 Flash
Memory Registers
Page
485
487
497
Revision (See Manual for Details)
Description amended
PEDR is initialized by a external power-on reset. However,
PEDR is not initialized for a reset by WDT, standby mode,
or sleep mode, so the previous data is retained.
Description amended
PFDR is an 8-bit read-only register that stores data for port F.
The bits PF7DR to PF0DR correspond to the PF7/AN7 to
PF0/AN0 pins. Any value written into these bits is ignored,
and there is no effect on the status of the pins. When any of the
bits are read, the pin status rather than the bit value is read
directly. However, when an A/D converter analog input is being
sampled, values of 1 are read out. Table 17.17 shows the
read/write operations of the port F data register.
PFDR is not initialized by power-on resets, standby mode,
or sleep mode (the bits always reflect the pin status).
Notes amended
Notes: FLMCR1, FLMCR2, and EBR1 are 8-bit registers, and
RAMER is a 16-bit register.
Only byte accesses are valid for FLMCR1, FLMCR2,
and EBR1, the access requiring 3 cycles. Three cycles
are required for a byte or word access to RAMER, and 6
cycles for a longword access.
When a longword write is performed on RAMER, 0 must
always be written to the lower word (address
H'FFFF8630). Operation is not guaranteed if any other
value is written.
1. In modes in which the on-chip flash memory is
disabled, a read will return H'00, and writes are
invalid. Writes are also disabled when the FWE bit
is set to 1 in FLMCR1.
2. A read in a mode in which on-chip flash memory is
disabled will return H'00.
3. When a low level is input to the FWP pin, the initial
value is H'80.
4. When a high level is input to the FWP pin, or if a low
level is input and the SWE bit in FLMCR1 is not set,
these registers are initialized to H'00.
Rev.5.00 Sep. 27, 2007 Page xvii of xxxiv
REJ09B0398-0500