SH7014 Datasheet, PDF (245/754 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Multifunction Timer Pulse Unit (MTU)
Channel 1 (TIOR1 Register)
Bits 7 to 4⎯I/O Control B3 to B0 (IOB3 to IOB0): These bits set the TGR1B register function.
Bit 7 Bit 6
IOB3 IOB2
0
0
1
1
0
1
Bit 5
IOB1
0
1
0
1
0
1
0
1
Bit 4
IOB0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
TGR1B
is an output
compare
register
Output disabled
(initial value)
Initial output is 0 Output 0 on compare-match
Output 1 on compare-match
Toggle output on compare-match
Output disabled
Initial output is 1 Output 0 on compare-match
Output 1 on compare-match
Toggle output on compare-match
TGR1B
is an input
capture
register
Capture input
source is the
TIOC1B pin
Input capture on rising edge
Input capture on falling edge
Input capture on both edges
Capture input
source TGR0C
compare/match
input capture
Input capture on channel
0/TGR0C compare-match/input
capture generation
Rev.5.00 Sep. 27, 2007 Page 211 of 716
REJ09B0398-0500